近些年来，以负责人身份，主持国家自然科学基金一项、河北省自然科学基金三项、中央高校基本科研业务费专项资金资助重点项目一项、面上项目一项。已公开出版学术专著两部，发表五十余篇学术论文，获得三项国家发明专利授权。

主要项目：

1.参数偏差影响下三维多核芯片的系统性能优化。国家自然科学基金项目，项目号：61204027；

2.参数偏差影响下三维嵌入式多核芯片能耗管理与优化研究。河北省自然科学基金项目，项目号：，F2013502274；

3.偏差感知的多处理器片上系统性能良品率统计分析与优化方法研究。中央高校基本科研业务费专项资金资助重点项目，项目号：2014ZD32.

4.云环境下电力系统基础计算优化关键技术研究。河北省自然科学基金，项目号：F2017502043。

5.考虑忆阻器静态缺陷与动态偏差的存算一体化神经网络加速器可靠性优化方法研究。河北省自然科学基金，项目号：F2021502006。

主要论文：

1.Song Jin, Songwei Pei and Yu Wang. A variation tolerant scheme for memristor crossbar based neural network designs via two-phase weight mapping and memristor programming. Future Generation Computer Systems (FGCS), 2020, 106:270-276.

2.Song Jin, Songwei Pei, Yu Wang and Yincheng Qi. A parallel sparse triangular solve algorithm based on dependency elimination of the solution vector. Cluster Computing, 2020, https://doi.org/10.1007/s10586-020-03188-x

3.Song, Jin, Songwei Pei and Yu Wang. On improving fault tolerance of memristor crossbar based neural network designs by target sparsifying. ACM/IEEE Design, Automation and Test in Europe (DATE), 2020:1-6.

4.Song Jin, Yuhang Wang and Tao Li. A low cost weight obfuscation scheme for security enhancement of ReRAM based neural network accelerators. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2020:1-6.

5.Songwei Pei and Song Jin. An effective structure and flow for pre-bond TSV test. IEICE Electronics Express, 2018, 15(12):1-6.

6.Song Jin, Songwei Pei, Yinhe Han, Huawei Li. A cost effective energy optimization framework of multi-core SoCs based on dynamically reconfigurable voltage-frequency islands. ACM Transactions on Design Automation of Electronic Systems (TODAES), 2016, 21(2):1-14.

7.Song Jin, Yinhe Han, Songwei Pei. Statistical energy optimization on voltage–frequency island based MPSoCs in the presence of process variations. Microelectronics Journal, 2016, 54:23-31.

8.Song Jin, Yu Wang and Tongna Liu. On optimizing system energy of voltage-frequency island based 3-D multi-core SoCs under thermal constraints. Integration, the VLSI Journal, 2015, 48(1):36-45.

9.Song Jin, Yinhe Han, Huawei Li, Xiaowei Li. Unified capture scheme for small delay defect detection and aging prediction. IEEE Transactions on Very Large Scale Integration Systems (VLSI), 2013, 21(5):821-833.

10.Songwei Pei, Huawei Li, Song Jin, Jun Liu, Xiaowei Li. An on-chip frequency programmable test clock generation and application method for small delay defect detection. Integration, the VLSI Journal. 2015, 49(1):87-97.

11.靳松, 韩银和, 王瑜. 面向三维多核片上系统的热感知硅后能耗优化方法. 计算机学报, 2016, 39(9):1763-1774.

学术专著：

1.靳松，韩银和. 纳米数字集成电路的偏差效应分析与优化-从电路级到系统级. 《清华大学出版社》,2019年6月

2.靳松fasting，韩银和. 纳米数字集成电路老化效应-分析、预测及优化. 《清华大学出版社》, 2012年6月.